There are a number of conventional processes for packaging integrated circuits (ICs). One approach, which is commonly referred to as “flip-chip” packaging, generally includes forming solder bumps (or other suitable contacts) directly on substrate, such as an IC die or an interposer supporting an IC die. The substrate is then “flipped” and attached to a package substrate. The solder bumps on the flipped substrate are aligned and mounted onto matching contacts on the package substrate. The solder bumps are then reflowed to electrically connect the flipped substrate to the package substrate.
When a flip-chip substrate is mounted to the package substrate, an air gap typically remains between the flipped substrate and package substrate. This gap is commonly filled with material, referred to as underfill, which flows into the gap in liquid form and then solidifies. The underfill material can be a mixture of an epoxy resin and small silica spheres. The underfill material can be applied in liquid form from a dispenser at one edge of the flipped substrate. The underfill then flows into the narrow gap due to capillary action and spreads across the flipped substrate until the gap is filled. The underfill material can be subject to shear and pealing stress, resulting in cracking, delamination, and the like.